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(25 Series) PI74FCT2273T
PI74FCT273T (25 Series) P174FCT2273T Octal D Flip-FlopPI74FCT273T with Master Reset
Fast CMOS Octal D Flip-Flop with Master Reset
Product Features
* PI74FCT273/2273T is pin compatible with bipolar FASTTM Series at a higher speed and lower power consumption * 25 series resistor on all outputs (FCT2XXX only) * TTL input and output levels * Low ground bounce outputs * Extremely low static power * Hysteresis on all inputs * Industrial operating temperature range: -40C to +85C * Packages available: - 20-pin 173 mil wide plastic TSSOP (L) - 20-pin 300 mil wide plastic DIP (P) - 20-pin 150 mil wide plastic QSOP (Q) - 20-pin 150 mil wide plastic TQSOP (R) - 20-pin 300 mil wide plastic SOIC (S)
Product Description
Pericom Semiconductor's PI74FCT series of logic circuits are produced in the Company's advanced 0.6/0.8 micron CMOS technology, achieving industry leading speed grades. All PI74FCT2XXX devices have a built-in 25-ohm series resistor on all outputs to reduce noise because of reflections, thus eliminating the need for an external terminating resistor. The PI74FCT273T and PI74FCT2273T is an 8-bit wide octal designed with eight edge-triggered D-type flip-flops with individual D inputs and O outputs. The common buffered Clock (CP) and Master Reset (MR) load and resets (clear) all flip-flops simultaneously. The register is fully edge-triggered. The D input state, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's O output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. Device models available upon request.
Logic Block Diagram
D0 CP D CP RD Q D CP RD Q D CP RD Q D CP RD Q D CP RD Q D CP RD Q D CP RD Q D CP RD Q D1 D2 D3 D4 D5 D6 D7
MR O0 O1 O2 O3 O4 O5 O6 O7
Product Pin Configuration
MR O0 D0 D1 O1 O2 D2 D3 O3 GND
1 20 2 19 3 18 20-PIN 4 17 L20 5 16 P20 6 15 Q20 7 14 R20 8 13 S20 9 12 10 11
Product Pin Description
Pin Name MR CP D0-D7 O0-O7 GND VCC Description Master Reset (Active LOW) Clock Pulse Input (Active Rising Edge) Data Inputs Data Outputs Ground Power
Truth Table(1)
Mode MR Reset (Clear) L Load "1" H Load "0" H Inputs CP X DN X h l Outputs ON L H L
Vcc O7 D7 D6 O6 O5 D5 D4 O4 CP
1. H = High Voltage Level h = High Voltage Level one setup time prior to the LOW-to-HIGH Clock transition L = Low Voltage Level l = LOW Voltage Level one setup time prior to the LOW-to-HIGH Clock Transition X = Don't Care = LOW-to-HIGH Clock Transition
PS2013A 03/09/96
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PI74FCT273T (25 Series) P174FCT2273T Octal D Flip-Flop with Master Reset
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ............................................................ -65C to +150C Ambient Temperature with Power Applied ............................ -40C to +85C Supply Voltage to Ground Potential (Inputs & Vcc Only) ..... -0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) .. -0.5V to +7.0V DC Input Voltage .................................................................... -0.5V to +7.0V DC Output Current .............................................................................. 120 mA Power Dissipation .....................................................................................0.5W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = -40C to +85C, VCC = 5.0V 5%)
Parameters Description VOH VOL VOL VIH VIL IIH IIL IOZH IOZL VIK IOFF IOS VH Test Conditions(1) IOH = -15.0mA IOL = 64mA IOL = 12mA (25 Series) 2.0 0.8 VIN = VCC VIN = GND VOUT = 2.7V VOUT = 0.5V VCC = Min., IIN = -18mA VCC = GND, VOUT = 4.5V VCC = Max.(3), VOUT = GND -- -60 -0.7 -- -120 200 1 -1 1 -1 -1.2 100 Min. Typ(2) Max. Units 2.4 3.0 0.3 0.3 0.55 0.50 V V V V V A A A A V A mA mV Output HIGH Voltage VCC = Min., VIN = VIH or VIL Output LOW Current Output LOW Current Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Current High Impedance Output Current Clamp Diode Voltage Power Down Disable Short Circuit Current Input Hysteresis VCC = Min., VIN = VIH or VIL VCC = Min., VIN = VIH or VIL Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = MAX.
Capacitance (TA = 25C, f = 1 MHz)
Parameters(4) CIN COUT Description Input Capacitance Output Capacitance Test Conditions VIN = 0V VOUT = 0V Typ 6 8 Max. 10 12 Units pF pF
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested.
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PS2013A 03/09/96
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PI74FCT273T (25 Series) P174FCT2273T Octal D Flip-Flop with Master Reset
Power Supply Characteristics
Parameters Description ICC ICC ICCD Quiescent Power Supply Current Supply Current per per Input @ TTL HIGH Supply Current per Input per MHx(4) Total Power Supply Current(6) VCC = Max. VCC = Max. Test Conditions(1) VIN = GND or VCC VIN = 3.4V(3) Min. Typ(2) 0.1 0.5 0.15 Max. 500 2.0 0.25 Units A mA mA/ MHz mA
VCC = Max., Outputs Open VIN = VCC MR = Vcc, One Input Toggling VIN = GND 50% Duty Cycle VCC = Max., Outputs Open fCP = 10 MHZ, 50% Duty Cycle MR = Vcc, 50% Duty Cycle One Bit toggling at fI = 5 MHZ VCC = Max., Outputs Open fCP = 10 MHZ, 50% Duty Cycle MR = VCC, 50% Duty Cycle Eight Bits toggling at fI = 2.5 MHZ, 50% Duty Cycle VIN = VCC VIN = GND VIN = 3.4V VIN = GND VIN = VCC VIN = GND VIN = 3.4V VIN = GND
IC
1.5 2.0 3.8
3.5(5) 3.5(5) 7.3(5)
6.0
16.3(5)
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz.
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PS2013A 03/09/96
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PI74FCT273T (25 Series) P174FCT2273T Octal D Flip-Flop with Master Reset
Switching Characteristics over Operating Range
273T/2273T Com. 273AT/2273AT Com. Max Min Max Min 273CT/2273CT Com. Max Min 273DT Com. Max Unit
Parameters tPLH tPHL tPHL tPLH tSU tH tw tW tREM
Description Propagation Delay CP to ON Propagation Delay MR to ON Setup Time, HIGH or LOW Dn to CP Hold Time, HIGH or LOW Dn to CP CP Pulse Width(3) HIGH or LOW MR Pulse Width(3) LOW Recovery Time MR to CP (3)
Conditions(1) CL = 50pF RL = 500
Min
2.0 2.0 3.0 2.0 7.0 7.0 4.0
13.0 13.0 -- -- -- -- --
2.0 2.0 2.0 1.5 6.0 6.0 2.0
7.2 7.2 -- -- -- -- --
2.0 2.0 2.0 1.5 6.0 6.0 2.0
5.8 6.1 -- -- -- -- --
2.0 2.0 2.0 1.5 3.0 3.0 2.0
4.4 5.0 -- -- -- -- --
ns ns ns ns ns ns ns
Notes: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter guaranteed but not production tested.
Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com
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PS2013A 03/09/96


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